സ്നാപ്ഡ്രാഗൺ 865 – എക്സ്ഡി‌എ ഡവലപ്പർമാർക്ക് AI പ്രകടനത്തിൽ ക്വാൽകോം വളരെയധികം മെച്ചപ്പെടുത്തലുകൾ വരുത്തിയത്


Translating…

It seems like we can’t go a day without seeing “artificial intelligence” in the news, and this past week was no exception in no small part thanks to the Snapdragon Tech Summit. Every year, Qualcomm unveils the plethora of improvements it brings to its Hexagon DSP and the Qualcomm AI Engine, a term they use for their entire heterogeneous compute platform – CPU, GPU, and DSP – when talking about AI workloads. A few years ago, Qualcomm’s insistence on moving the conversation away from traditional talking points, such as year-on-year CPU performance improvements, seemed a bit odd. Yet in 2019 and with the Snapdragon 865, we see that heterogeneous computing is indeed at the helm of their mobile computing push, as AI and hardware-accelerated workloads seem to sneak their way into a breadth of use cases and applications, from social media to everyday services.

The Snapdragon 865 is bringing Qualcomm’s 5th generation AI engine, and with it come juicy improvements in performance and power efficiency — but that’s to be expected. In a sea of specifications, performance figures, fancy engineering terms, and tiresome marketing buzzwords, it’s easy to lose sight of what these improvements actually mean. What do they describe? Why are these upgrades so meaningful to those implementing AI in their apps today, and perhaps more importantly, to those looking to do so in the future?

In this article, we’ll take an approachable yet thorough tour of the Qualcomm AI Engine combing through its history, its components and the Snapdragon 865’s upgrades, and most importantly, why or how each of these have contributed to today’s smartphone experience, from funny filters to digital assistants.

The Hexagon DSP and Qualcomm AI Engine: When branding makes a difference

While I wasn’t able to attend this week’s Snapdragon Tech Summit, I have nonetheless attended every other one since 2015. If you recall, that was the year of the hot mess that was the Snapdragon 810, and so journalists at that Chelsea loft in New York City were eager to find out how the Snapdragon 820 would redeem the company. And it was a great chipset, alright: It promised healthy performance improvements (with none of the throttling) by going back to the then-tried-and-true custom cores Qualcomm was known for. Yet I also remember a very subtle announcement that, in retrospect, ought to have received more attention: the second generation Hexagon 680 DSP and its single instruction, multiple data (SIMD) Hexagon Vector eXtensions, or HVX. Perhaps if engineers hadn’t named the feature, it would have received the attention it deserved.

This coprocessor allows the scalar DSP unit’s hardware threads to access HVX “contexts” (register files) for wide vector processing capabilities. It enabled the offloading of significant compute workloads from the power-hungry CPU or GPU to the power-efficient DSP so that imaging and computer vision tasks would run at substantially improved performance per milliwatt. They are perfect for applying identical operations on contiguous vector elements (originally just integers), making them a good fit for computer vision workloads. We’ve written an in-depth article on the DSP and HVX in the past, noting that the HVX architecture lends itself well to parallelization and, obviously, processing large input vectors. At the time, Qualcomm promoted both the DSP and HVX almost exclusively by describing the improvements they would bring to computer vision workloads such as the Harris corner detector and other sliding window methods.

It wasn’t until the advent of deep learning in consumer mobile applications that the DSP, its vector processing units (and now, a tensor accelerator) would get married to AI and neural networks, in particular. But looking back, it makes perfect sense: The digital signal processor (DSP) architecture, originally designed for handling digitized real-world or analog signal inputs, lends itself to many of the same workloads as many machine learning algorithms and neural networks. For example, DSPs are tailored for filter kernels, convolution and correlation operations, 8-bit calculations, a ton of linear algebra (vector and matrix products) and multiply-accumulate (MAC) operations, all most efficient when parallelized. A neural network’s runtime is also highly dependent on multiplying large vectors, matrices and/or tensors, so it’s only natural that the DSP’s performance advantages neatly translate to neural network architectures as well. We will revisit this topic in short!

In subsequent years, Qualcomm continued to emphasize that they offer not just chipsets, but mobile platforms, and that they focus not just on improving particular components, but delivering “heterogeneous” compute. In 2017, they released their Snapdragon Neural Processing Engine SDK (for runtime acceleration) on the Qualcomm Developer Network, and in early 2018 they announced the Qualcomm Artificial Intelligence Engine to consolidate their several AI-capable hardware (CPU, GPU, DSP) and software components under a single name. With this useful nomenclature, they were able to neatly advertise their AI performance improvements on both the Snapdragon 855 and Snapdragon 865, being able to comfortably spell out the number of trillions of operations per second (TOPS) and year-on-year percentage improvements. Harnessing the generational improvements in CPU, GPU, and DSP – all of which see their own AI-focused upgrades – the company is able to post impressive benchmarks against competitors, which we’ll go over shortly. With the company’s recent marketing efforts and unified, consistent messaging on heterogeneous computing, their AI branding is finally gaining traction among journalists and tech enthusiasts.

Demystifying Neural Networks: A mundane pile of linear algebra

To disentangle a lot of jargon we’ll come across later in the article, we need a short primer on what a neural network is and what you need to make it faster. I want to very briefly go over some of the mathematical underpinnings of neural networks, avoiding as much jargon and notation as possible. The purpose of this section is simply to identify what a neural network is doing, fundamentally: the arithmetic operations it executes, rather than the theoretical basis that justifies said operations (that is far more complicated!). Feel free to proceed to the next section if you want to jump straight to the Qualcomm AI Engine upgrades.

“Vector math is the foundation of deep learning.” – Travis Lanier, Senior Director of Product Management at Qualcomm at the 2017 Snapdragon Tech Summit

Below you will find a very typical feedforward fully-connected neural network diagram. In reality, the diagram makes the whole process look a bit more complicated than it is (at least, until you get used to it). We will compute a forward pass, which is ultimately what a network is doing whenever it produces an inference, a term we’ll encounter later in the article as well. At the moment, we will only concern ourselves with the machine and its parts, with brief explanations of each component.

A neural network consists of sequential layers, each comprised of several “neurons” (depicted as circles in the diagram) connected by weights (depicted as lines in the diagram). In general terms, there are three kinds of layers: the input layer, which takes the raw input; hidden layers, which compute mathematical operations from the previous layer, and the output layer, which provides the final predictions. In this case, we have only one hidden layer, with three hidden units. The input consists of a vector, array, or list of numbers of a particular dimension or length. In the example, we will have a two-dimensional input, let’s say [1.0, -1.0]. Here, the output of the network consists of a scalar or single number (not a list). Each hidden unit is associated with a set of weights and a bias term, shown alongside and below each node. To calculate the weighted sum output of a unit, each weight is multiplied with each corresponding input, and then the products are added together. Then, we will simply add the bias term to that sum of products, resulting in the output of the neuron. For example, with our input of [1.0,-1.0], the first hidden unit will have an output of 1.0*0.3 + (-1.0) * 0.2 + 1.0 = 1.1. Simple, right?

The next step in the diagram represents an activation function, and is what will allow us to produce the output vector of each hidden layer. In our case, we will be using the very popular and extremely simple rectified linear unit or ReLU, which will take an input number and output either (i) zero, if that number is negative or zero (ii) the input number itself, if the number is positive. For example, ReLU(-0.1) = 0, but ReLU(0.1) = 0.1. Following the example of our input as it propagates through that first hidden unit, the output of 1.1 that we computed would be passed into the activation function, yielding ReLU(1.1)=1.1. The output layer, in this example, will function just like a hidden unit: it will multiply the hidden units’ outputs against its weights, and then add its bias term of 0.2. The last activation function, the step function, will turn positive inputs into 1 and negative values into 0. Knowing how each of the operations in the network operates, we can write down the complete computation of our inference as follows:

That is all there is to our feedforward neural network computation. As you can see, the operations consist almost entirely of products and sums of numbers. Our activation function ReLU(x) can be implemented very easily as well, for example by simply calling max(x,0), such that it returns x whenever the input is greater than 0, but otherwise it returns 0. Note that step(x) can be computed similarly. Many more complicated activation functions exist, such as the sigmoidal function or the hyperbolic tangent, involving different internal computations and better-suited for different purposes. Another thing you can already begin noticing is that we also can run the three hidden units’ computations, and their ReLU applications, in parallel, as their values are not needed at the same time up until we calculate their weighted sum at the output node.

But we don’t have to stop there. Above, you can see the same computation, but this time represented with matrix and vector multiplication operations instead. To arrive at this representation, we “augment” our input vector by adding a 1.0 to it (lighter hue), such that when we put our weights and our bias (lighter hue) in the matrix as shown above, the resulting multiplication yields the same hidden unit outputs. Then, we can apply ReLU on the output vector, element-wise, and then “augment” the ReLU output to multiply it by the weights and bias of our output layer. This representation greatly simplifies notation, as the parameters (weights and biases) of an entire hidden layer can be tucked under a single variable. But most importantly for us, it makes it clear that the inner computations of the network are essentially matrix and vector multiplication or dot products. Given how the size of these vectors and matrices scale with the dimensionality of our inputs and the number of parameters in our network, most runtime will be spent doing these sorts of calculations. A bunch of linear algebra!

Our toy example is, of course, very limited in scope. In practice, modern deep learning models can have tens if not hundreds of hidden layers, and millions of associated parameters. Instead of our two-dimensional vector input example, they can take in vectors with thousands of entries, in a variety of shapes, such as matrices (like single-channel images) or tensors (three-channel RGB images). There is also nothing stopping our matrix representation from taking in multiple inputs vectors at once, by adding rows to our original input. Neural networks can also be “wired” differently than our feedforward neural network, or execute different activation functions. There is a vast zoo of network architectures and techniques, but in the end, they mostly break down to the same parallel arithmetic operations we find in our toy example, just at a much larger scale.

Visual example of convolution layers operating on a tensor. (Image credit: Towards Data Science)

For example, the popular convolutional neural networks (CNNs) that you likely have read about are not “fully-connected” like our mock network. The “weights” or parameters of its hidden convolutional layers can be thought of as a sort of filter, a sliding window applied sequentially to small patches of an input as shown above — this “convolution” is really just a sliding dot product! This procedure results in what’s often called a feature map. Pooling layers reduce the size of an input or a convolutional layer’s output, by computing the maximum or average value of small patches of the image. The rest of the network usually consists of fully-connected layers, like the ones in our example, and activation functions like ReLU. This is often used for feature extraction in images where early convolutional layers’ feature maps can “detect” patterns such as lines or edges, and later layers can detect more complicated features such as faces or complex shapes.

All of what’s been said is strictly limited to inference, or evaluating a neural network after its parameters have been found through training which is a much more complicated procedure. And again, we’ve excluded a lot of explanations. In reality, each of the network’s components is included for a purpose. For example, those of you who have studied linear algebra can readily observe that without the non-linear activation functions, our network simplifies to a linear model with very limited predictive capacity.

An Upgraded AI Engine on the Snapdragon 865 – A Summary of Improvements

With this handy understanding of the components of a neural network and their mathematical operations, we can begin to understand exactly why hardware acceleration is so important. In the last section, we can observe that parallelization is vital to speeding up the network given it allows us, for example, to compute several parallel dot-products corresponding to each neuron activation. Each of these dot-products is itself constituted of multiply-add operations on numbers, usually with 8-bit precision in the case of mobile applications, that must happen as quickly as possible. The AI Engine offers various components to offload these tasks depending on the performance and power efficiency considerations of the developer.

A diagram of a CNN for the popular MNIST dataset, shown on stage at this year’s Snapdragon Summit. The vector processing unit is a good fit for the fully-connected layers, like in our mock example. Meanwhile, the tensor processor handles the convolutional and pooling layers that process multiple sliding kernels in parallel, like in the diagram above, and each convolutional layer might output many separate feature maps.

First, let’s look at the GPU, which we usually speak about in the context of 3D games. The consumer market for video games has stimulated development in graphics processing hardware for decades, but why are GPUs so important for neural networks? For starters, they chew through massive lists of 3D coordinates of polygon vertices at once to keep track of an in-game world state. The GPU must also perform gigantic matrix multiplication operations to convert (or map) these 3D coordinates onto 2D planar, on-screen coordinates, and also handle the color information of pixels in parallel. To top it all off, they offer high memory bandwidth to handle the massive memory buffers for the texture bitmaps overlaid onto the in-game geometry. Its advantages in parallelization, memory bandwidth, and resulting linear algebra capabilities match the performance requirements of neural networks.

The Adreno GPU line thus has a big role to play in the Qualcomm AI Engine, and on stage, Qualcomm stated that this updated component in the Snapdragon 865 enables twice as much floating-point capabilities and twice the number of TOPS compared to the previous generation, which is surprising given that they only posted a 25% performance uplift for graphics rendering. Still, for this release, the company boasts a 50% increase in the number of arithmetic logic units (ALUs), though as per usual, they have not disclosed their GPU frequencies. Qualcomm also listed mixed-precision instructions, which is just what it sounds like: different numerical precision across operations in a single computational method.

Adreno 650 GPU in the Qualcomm Snapdragon 865

The Hexagon 698 DSP is where we see a huge chunk of the performance gains offered by the Snapdragon 865. This year, the company has not communicated improvements in their DSP’s vector eXtensions (whose performance quadrupled in last year’s 855), nor their scalar units. However, they do note that for this block’s Tensor Accelerator, they’ve achieved four times the TOPs compared to the version introduced last year in the Hexagon 695 DSP, while also being able to offer 35% better power efficiency. This is a big deal considering the prevalence of convolutional neural network architectures in modern AI use cases ranging from image object detection to automatic speech recognition. As explained above, the convolution operation in these networks produces a 2D array of matrix outputs for each filter, meaning that when stacked together, the output of a convolution layer is a 3D array or tensor.

Qualcomm also promoted their “new and unique” deep learning bandwidth compression technique, which can apparently compress data losslessly by around 50%, in turn moving half the data and freeing up bandwidth for other parts of the chipset. It should also save power by reducing that data throughput, though we weren’t given any figures and there ought to be a small power cost to compressing the data as well.

On the subject of bandwidth, the Snapdragon 865 supports LPDDR5 memory, which will also benefit AI performance as it will increase the speed at which resources and input data are transferred. Beyond hardware, Qualcomm’s new AI Model Efficiency Toolkit makes easy model compression and resulting power efficiency savings available to developers. Neural networks often have a large number of “redundant” parameters; for example, they may make hidden layers wider than they need to be. One of the AI Toolkit features discussed on stage is thus model compression, with two of the cited methods being spatial singular value decomposition (SVD) and bayesian compression, both of which effectively prune the neural network by getting rid of redundant nodes and adjusting the model structure as required. The other model compression technique presented on stage relates to quantization, and that involves changing the numerical precision of weight parameters and activation node computations.

The numerical precision of neural network weights refers to whether the numerical values used for computation are stored, transferred, and processed as 64, 32, 16 (half-precision) or 8-bit values. Using lower numerical precision (for example, INT8 versus FP32) reduces overall memory usage and data transfer speeds, allowing for higher bandwidth and faster inferences. A lot of today’s deep learning applications have switched to 8-bit precision models for inference, which might sound surprising: wouldn’t higher numerical accuracy enable more “accurate” predictions in classification or regression tasks? Not necessarily; higher numerical precision, particularly during inference, may be wasted as neural networks are trained to cope with noisy inputs or small disturbances throughout training anyway, and the error on the lower-bit representation of a given (FP) value is uniformly ‘random’ enough. In a sense, the low-precision of the computations is treated by the network as another source of noise, and the predictions remain usable. Heuristic explainers aside, it is likely you will accrue an accuracy penalty when lousily quantizing a model without taking into account some important considerations, which is why a lot of research goes into the subject

Back to the Qualcomm AI Toolkit: Through it they offer data-free quantization, allowing models to be quantized without data or parameter fine-tuning while still achieving near-original model performance on various tasks. Essentially, it adapts weight parameters for quantization and corrects for the bias error introduced when switching to lower precision weights. Given the benefits incurred by quantization, automating the procedure under an API call would simplify model production and deployment, and Qualcomm claims more than four times the performance per watt when running the quantized model.

But again, this isn’t shocking: quantizing models can offer tremendous bandwidth and storage benefits. Converting a model to INT8 not only nets you a 4x reduction in bandwidth, but also the benefit of faster integer computations (depending on the hardware). It is a no-brainer, then, that hardware-accelerated approaches to both the quantization and the numerical computation would yield massive performance gains. On his blog, for example, Google’s Pete Warden wrote that a collaboration between Qualcomm and Tensorflow teams enables 8-bit models to run up to seven times faster on the HVX DSP than on the CPU. It’s hard to overstate the potential of easy-to-use quantization, particularly given how Qualcomm has focused on INT8 performance.

The Snapdragon 865’s ARM-based Kryo CPU is still an important component of the AI engine. Even though the hardware acceleration discussed in the above paragraphs is preferable, sometimes we can’t avoid applications that do not properly take advantage of these blocks, resulting in CPU fallback. In the past, ARM had introduced specific instruction sets aimed at accelerating matrix- and vector-based calculations. In ARMv7 processors, we saw the introduction of ARM NEON, a SIMD architecture extension enabling DSP-like instructions. And with the ARMv8.4-A microarchitecture, we saw the introduction of an instruction specifically for dot-products.

All of these posted performance gains relate to many of the workloads we described in the previous section, but it’s also worth keeping in mind that these Snapdragon 865 upgrades are only the latest improvements in Qualcomm’s AI capabilities. In 2017, we documented their tripling of AI capabilities with the Hexagon 685 DSP and other chipset updates. Last year, they introduced their tensor accelerator, and integrated support for non-linearity functions (like the aforementioned ReLU!) at the hardware level. They also doubled the number of vector accelerators and improved the scalar processing unit’s performance by 20%. Pairing all of this with enhancements on the CPU side, like those faster dot-product operations courtesy of ARM, and the additional ALUs in the GPU, Qualcomm ultimately tripled raw AI capabilities as well.

Practical Gains and Expanded Use-Cases

All of these upgrades have lead to five times the AI capabilities on the Snapdragon 865 compared to just two years ago, but perhaps most importantly, the improvements also came with better performance per milliwatt, a critical metric for mobile devices. At the Snapdragon Summit 2019, Qualcomm gave us a few benchmarks comparing their AI Engine against two competitors on various classification networks. These figures look to be collected using AIMark, a cross-platform benchmarking application, which enables comparisons against Apple’s A-series and Huawei’s HiSilicon processors. Qualcomm claims that these results make use of the entire AI Engine, and we’ll have to wait until more thorough benchmarking to properly disentangle the effect of each component and determine how these tests were conducted. For example, do the results from company B indicate CPU fallback? As far as I’m aware, AIMark currently doesn’t advantage of the Kirin 990’s NPU on our Mate 30 Pro units, for example. But it does support the Snapdragon Neural Processing Engine, so it will certainly take advantage of the Qualcomm AI Engine; given it is internal testing, it’s not explicitly clear whether the benchmark is properly utilizing the right libraries or SDK for its competitors.

It must also be said that Qualcomm is effectively comparing the Snapdragon 865’s AI processing capabilities against previously-announced or released chipsets. It is very likely that its competitors will bring similarly-impactful performance improvements in the next cycle, and if that’s the case, then Qualcomm would only hold the crown for around half a year from the moment Snapdragon 865 devices hit the shelves. That said, these are still indicative of the kind of bumps we can expect from the Snapdragon 865. Qualcomm has generally been very accurate when communicating performance improvements and benchmark results of upcoming releases.

Qualcomm Snapdragon 865 AI performance versus competitors

All of the networks presented in these benchmarks are classifying images from databases like ImageNet, receiving them as inputs and outputting one out of hundreds of categories. Again, they rely on the same kinds of operations we described in the second section, though their architectures are a lot more complicated than these examples and they’ve been regarded as state of the art solutions at their time of publication. In the best of cases, their closest competitor provides less than half the number of inferences per second.

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consumption ർജ്ജ ഉപഭോഗത്തിന്റെ കാര്യത്തിൽ, ഒരു നിശ്ചിത അളവിൽ സാധ്യമായ AI പ്രോസസ്സിംഗിന്റെ അളവ് കാണിക്കുന്നതിന് ക്വാൽകോം ഒരു വാട്ട് കണക്കുകളിൽ അനുമാനങ്ങൾ വാഗ്ദാനം ചെയ്തു. മികച്ച സാഹചര്യങ്ങളിൽ (മൊബൈൽനെറ്റ് എസ്എസ്ഡി), ഒരേ പവർ ബജറ്റിന് കീഴിൽ സ്നാപ്ഡ്രാഗൺ എഐ എഞ്ചിന് ഇരട്ടി എണ്ണം അനുമാനങ്ങൾ വാഗ്ദാനം ചെയ്യാൻ കഴിയും. P>

മൊബൈൽ ഉപകരണങ്ങൾക്ക് പവർ പ്രധാനമാണ്. ഉദാഹരണത്തിന്, ഒരു ന്യൂറൽ നെറ്റ്‌വർക്ക് അധിഷ്‌ഠിത സ്‌നാപ്ചാറ്റ് ഫിൽട്ടറിനെക്കുറിച്ച് ചിന്തിക്കുക. വാസ്തവത്തിൽ, കമ്പ്യൂട്ടർ വിഷൻ പൈപ്പ്ലൈൻ മുഖത്തിന്റെ വിവരങ്ങൾ എക്‌സ്‌ട്രാക്റ്റുചെയ്യുന്നതും മാസ്‌ക് അല്ലെങ്കിൽ ഇൻപുട്ട് പരിവർത്തനം പ്രയോഗിക്കുന്നതും ഒരു ദ്രാവക അനുഭവം നേടുന്നതിന് സെക്കൻഡിൽ 30 അല്ലെങ്കിൽ 60 പൂർത്തീകരണ നിരക്കിൽ പ്രവർത്തിക്കേണ്ടതുണ്ട്. അസംസ്കൃത AI പ്രകടനം വർദ്ധിപ്പിക്കുന്നത് ഉയർന്ന റെസല്യൂഷൻ ഇൻപുട്ടുകൾ എടുക്കുന്നതിനും മികച്ചതായി കാണപ്പെടുന്ന ഫിൽട്ടറുകൾ output ട്ട്‌പുട്ട് ചെയ്യുന്നതിനും നിങ്ങളെ പ്രാപ്‌തമാക്കും, പക്ഷേ വേഗത്തിൽ അപ്‌ലോഡുചെയ്യുന്നതിനും എച്ച്ഡി റെസല്യൂഷനായി തീർപ്പാക്കുന്നതിനും വൈദ്യുതി ഉപഭോഗവും താപ ത്രോട്ടിലിംഗും കുറയ്ക്കുന്നതും നല്ലതാണ്. പല ആപ്ലിക്കേഷനുകളിലും, “വേഗത” എന്നത് “മികച്ചത്” ആയിരിക്കണമെന്നില്ല, തുടർന്ന് ഒരാൾ മെച്ചപ്പെട്ട effici ർജ്ജ കാര്യക്ഷമതയുടെ നേട്ടം കൊയ്യുന്നു. P>

 ക്വാൽകോം സ്‌നാപ്ഡ്രാഗൺ 865

സ്നാപ്ഡ്രാഗൺ ഉച്ചകോടിയുടെ രണ്ടാം ദിനത്തിൽ, സ്നാപ്ചാറ്റിലെ സീനിയർ എഞ്ചിനീയറിംഗ് ഡയറക്ടർ യൂറി മൊണാസ്റ്റൈർഷൈൻ അവരുടെ ഏറ്റവും പുതിയ ആഴത്തിലുള്ള പഠന-അധിഷ്ഠിത ഫിൽട്ടറുകൾ എങ്ങനെയാണ് ഹെക്സഗൺ ഡയറക്ട് എൻ‌എൻ ഹെക്സഗൺ 695 ഡി‌എസ്‌പി ഉപയോഗിച്ച് ഹെക്സഗൺ ഡയറക്റ്റ് എൻ‌എൻ വളരെയധികം ത്വരിതപ്പെടുത്തിയതെന്ന് കാണിക്കാൻ വേദിയിലെത്തി. സ്നാപ്ഡ്രാഗൺ 865.

അതിനുമുകളിൽ, ഡെവലപ്പർമാർക്ക് ലഭിക്കുമ്പോൾ എളുപ്പത്തിലുള്ള ന്യൂറൽ നെറ്റ്‌വർക്ക് നടപ്പിലാക്കലുകളിലേക്കുള്ള ആക്‌സസ്സ് കൂടാതെ കൂടുതൽ ആപ്ലിക്കേഷനുകൾ AI ടെക്നിക്കുകൾ ഉപയോഗിക്കാൻ തുടങ്ങുന്നു, ഒരേ സമയത്തുള്ള ഉപയോഗ കേസുകൾ കൂടുതൽ ശ്രദ്ധയാകർഷിക്കും, കാരണം സ്മാർട്ട്‌ഫോണിന് ഒന്നിലധികം സമാന്തര AI പൈപ്പ്ലൈനുകൾ ഒരേസമയം കൈകാര്യം ചെയ്യേണ്ടിവരും (ഒന്നിൽ നിന്ന് ഒരു അപ്ലിക്കേഷൻ പ്രോസസ്സിംഗ് ഇൻപുട്ട് സിഗ്നലുകൾക്കായി) വിവിധ ഉറവിടങ്ങൾ അല്ലെങ്കിൽ നിരവധി അപ്ലിക്കേഷനുകൾ ഉപകരണത്തിൽ വെവ്വേറെ പ്രവർത്തിക്കുന്നു). ഡി‌എസ്‌പി, ജിപിയു, സിപിയു എന്നിവയിലുടനീളം മാന്യമായ effici ർജ്ജ കാര്യക്ഷമത നേട്ടങ്ങൾ ഞങ്ങൾ കാണുമ്പോൾ, ക്വാൽകോം സെൻസിംഗ് ഹബ് വളരെ കുറഞ്ഞ വൈദ്യുതി ഉപഭോഗത്തിൽ ട്രിഗർ വാക്കുകൾ കേൾക്കുന്നതിന് എല്ലായ്‌പ്പോഴും ഉപയോഗത്തിലുള്ള കേസുകൾ കൈകാര്യം ചെയ്യുന്നു. നിലവിലുള്ള 1 എം‌എയിൽ താഴെയുള്ള ഓഡിയോ, വീഡിയോ, സെൻസർ ഫീഡുകൾ നിരീക്ഷിക്കാൻ ഇത് പ്രാപ്‌തമാക്കുന്നു, പരിചിതമായ ഡിജിറ്റൽ അസിസ്റ്റന്റ് കീവേഡുകളുടെ മുകളിൽ പ്രത്യേക ശബ്‌ദ സൂചകങ്ങൾ (ഒരു കുഞ്ഞ് കരയുന്നത് പോലെ) കണ്ടെത്താൻ ഉപകരണത്തെ അനുവദിക്കുന്നു. ആ കുറിപ്പിൽ, ഒരു അംഗീകൃത ഉപയോക്താവിനെ തിരിച്ചറിയാനും അതിനനുസരിച്ച് പ്രവർത്തിക്കാനും കീവേഡ് മാത്രമല്ല അത് ആരാണ് സംസാരിക്കുന്നതെന്ന് കണ്ടെത്താനും സ്നാപ്ഡ്രാഗൺ 865 പ്രാപ്തമാക്കുന്നു. P>

എഡ്ജ് ഉപകരണങ്ങളിൽ കൂടുതൽ AI

ഈ മെച്ചപ്പെടുത്തലുകൾ‌ ആത്യന്തികമായി നിങ്ങളുടെ ഉപയോക്തൃ അനുഭവത്തിനായി വ്യക്തമായ നേട്ടങ്ങളിലേക്ക് വിവർത്തനം ചെയ്യാൻ‌ കഴിയും. വിവർത്തനം, ഒബ്‌ജക്റ്റ് തിരിച്ചറിയലും ലേബലിംഗും, ഉപയോഗ പ്രവചനങ്ങൾ അല്ലെങ്കിൽ ഇന ശുപാർശകൾ, സ്വാഭാവിക ഭാഷാ ധാരണ, സ്പീച്ച് പാഴ്‌സിംഗ് തുടങ്ങിയവ ഉൾപ്പെടുന്ന സേവനങ്ങൾ വേഗത്തിൽ പ്രവർത്തിക്കുകയും കുറഞ്ഞ വൈദ്യുതി ഉപയോഗിക്കുകയും ചെയ്യുന്നതിന്റെ ഗുണം നേടും. ഉയർന്ന കമ്പ്യൂട്ട് ബജറ്റ് ഉള്ളത് പുതിയ ഉപയോഗ കേസുകളും അനുഭവങ്ങളും സൃഷ്ടിക്കുന്നതിനും ക്ലൗഡിൽ നടക്കുന്ന പ്രക്രിയകളെ നിങ്ങളുടെ ഉപകരണത്തിലേക്ക് മാറ്റുന്നതിനും പ്രാപ്തമാക്കുന്നു. AI എന്നത് ഒരു പദം എന്ന നിലയിൽ മുൻ‌കാലങ്ങളിൽ സംശയാസ്പദവും വഞ്ചനാപരവും തെറ്റായതുമായ മാർ‌ഗ്ഗങ്ങളിൽ‌ ഉപയോഗിച്ചിട്ടുണ്ടെങ്കിലും (ഒ‌ഇ‌എമ്മുകൾ‌ പോലും), നിങ്ങൾ‌ ഇന്ന്‌ ആസ്വദിക്കുന്ന നിങ്ങളുടെ സേവനങ്ങളിൽ‌ പലതും ആത്യന്തികമായി ഏതെങ്കിലും രൂപത്തിലോ മറ്റേതെങ്കിലും രീതിയിലോ യന്ത്ര പഠന അൽ‌ഗോരിതംസിനെ ആശ്രയിക്കുന്നു. P>

എന്നാൽ ക്വാൽകോമിന് അപ്പുറം, മറ്റ് ചിപ്‌സെറ്റ് നിർമ്മാതാക്കൾ ഈ മുന്നണിയിലും വേഗത്തിൽ ആവർത്തിക്കുകയും മെച്ചപ്പെടുത്തുകയും ചെയ്യുന്നു. ഉദാഹരണത്തിന്, 990 5 ജി ഒരു 2 + 1 എൻ‌പിയു കോർ ഡിസൈൻ കൊണ്ടുവന്നു, അതിന്റെ ഫലമായി കിരിൻ 980 ന്റെ പ്രകടനത്തിന്റെ 2.5 ഇരട്ടിയും ആപ്പിൾ എ 12 ന്റെ ഇരട്ടി പ്രകടനവും ഉണ്ടായി. പ്രോസസ്സർ പ്രഖ്യാപിച്ചപ്പോൾ, ഐ‌എൻ‌ടി 8 മൊബൈൽ‌നെറ്റിലെ സ്‌നാപ്ഡ്രാഗൺ 855 ന്റെ സെക്കൻഡിൽ ഇരട്ടി ഫ്രെയിമുകൾ (അനുമാനങ്ങൾ) വാഗ്ദാനം ചെയ്യുന്നതായി കാണിച്ചു, ഇത് ക്വാൽകോം നൽകിയ ഫലങ്ങളുമായി സമചതുരാകാൻ പ്രയാസമാണ്. അതേസമയം, ആപ്പിൾ എ 13 ബയോണിക് അതിന്റെ മുൻഗാമിയെക്കാൾ ആറിരട്ടി വേഗതയുള്ള മാട്രിക്സ് ഗുണനത്തിന് വാഗ്ദാനം ചെയ്തതായും എട്ട് കോർ ന്യൂറൽ എഞ്ചിൻ ഡിസൈൻ മെച്ചപ്പെടുത്തിയതായും റിപ്പോർട്ടുണ്ട്. നിലവിലുള്ളതും ഭാവിയിൽ വരുന്നതുമായ എതിരാളികൾക്കെതിരെ വാണിജ്യ ഉപകരണങ്ങളിൽ സ്‌നാപ്ഡ്രാഗൺ 865 ശരിയായി പരീക്ഷിക്കുന്നത് വരെ ഞങ്ങൾ കാത്തിരിക്കേണ്ടിവരും, എന്നാൽ മൂന്ന് കമ്പനികളും അവരുടെ AI പ്രകടനം മെച്ചപ്പെടുത്തുന്നതിനായി ഒരു ടൺ വിഭവങ്ങൾ പകർന്നുകൊണ്ടിരിക്കുന്നതിനാൽ ഈ ഇടത്തിലെ മത്സരം ഒരിക്കലും നിലനിൽക്കില്ലെന്ന് വ്യക്തമാണ്. .

 

ഇതുപോലുള്ള കൂടുതൽ‌ പോസ്റ്റുകൾ‌ നിങ്ങളുടെ ഇൻ‌ബോക്സിലേക്ക് കൈമാറണോ? ഞങ്ങളുടെ വാർത്താക്കുറിപ്പ് സബ്‌സ്‌ക്രൈബുചെയ്യുന്നതിന് നിങ്ങളുടെ ഇമെയിൽ നൽകുക. P>